Controlled CTE / SMT

Why is the CTE of a MLB so important? In the case of a ceramic chip carrier (CTE 6 ppm/
°C) mounted on a conventional printed circuit board (CTE 17-18 ppm/°C), when the chip
carrier is large enough, the mismatch in expansion will cause shear stresses within the
solder joint that mounts the device on the board. A sufficient number of thermal test
cycles (typically -65°C to +125°C) will eventually lead to work hardening of the solder and
cracking of the solder joint itself. The resulting intermittent electrical discontinuity is
entirely unacceptable in high reliability electronics applications regardless of their
application.

In the case of stacked dies and direct chip attach, the requirements become even more
critical since CTE values for die materials can be between 3-4.5 ppm/˚C and the
mismatch is even more critical than for leadless ceramic packages. A normal laminate
with a CTE of 17-18 ppm/˚C could result in excessive strain on solder joints and
subsequent work hardening and cracking.

In addition to the above, newer lead-free solder systems may be considerably more
“brittle” than traditional lead-tin, whereby a mismatch between the expansion of the
device and that of the board may cause work-hardening and potential cracking after less
thermal cycles, making CTE matching even more important.

The 85NT has evolved as the product of choice for applications requiring a lower
controlled CTE. Contact Arlon for technical assistance is selecting the best product for
your application.

Additional Information

Other Areas